Labels Milestones
BackLevel chip-size package; 15 bumps (6-3-6), 2.37x1.17mm, 15 Ball, 6x3 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF NXP VFBGA-42, 3.0x2.6mm, 42 Ball, 6x7 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32u575og.pdf#page=306 ST WLCSP-100, ST die ID 450, 4.96x4.64mm, 156 Ball, 13x12 Layout, 0.35mm Pitch, https://www.onsemi.com/pdf/datasheet/ncp163-d.pdf#page=23 6pin Pitch 0.4mm 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology 05081733_A_DF12.pdf DFN12, 4x4, 0.65P; CASE 506CE (see ON Semiconductor 122BX.PDF 32-Lead Plastic Thin Shrink Small-Outline Package, Body 3.0x3.0x0.8mm, Texas Instruments EUK 7 Pin Double Sided Module Texas Instruments EUS 5 Pin (https://www.jedec.org/sites/default/files/docs/MO-193D.pdf variant AB), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55935-1010, with PCB locator, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf.
New Pull Request