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Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: ============================================================= 77735c00cc3285131373f5cfc61b82eab5963d12 2cddc4d62d38c9e1b69839f92a19e7915eecbceb 5ff3077e8252367b7eceb0b21b0803904b695d42 e49f4ab127dc081ee1c77dd21e80d128628a1152 2dd0b8c0c736720a0b064bbe1304dc9562beb260 Latest commits for file Schematics/SynthMages.pretty/POT_2_PIN_Header.kicad_mod From 7d48e110137d43d1f6f9100282eff6558c28f26b Mon Sep 17 00:00:00 2001 Subject: [PATCH] To GitLab Hardware/PCB/precadsr/precadsr.kicad_pcb | 3 | 4.7k | Resistor | | | | | | | | R9, R11, R13 | 3 Hardware/PCB/precadsr/precadsr.sch | 412 Hardware/PCB/precadsr/precadsr.xml | 1557 Hardware/PCB/precadsr/sym-lib-table | 3 | A1M | \*\*Potentiometer, 9 mm or 16 mm vertical board mount. Only 16 mm vertical board mount | | C6, C7, C8, C9 | 4 .../PCB/precadsr_Gerbers/precadsr-PTH.drl | 207.

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