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============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 Latest commits for file Schematics/SynthMages.pretty/POT_2_PIN_Header.kicad_mod From 7d48e110137d43d1f6f9100282eff6558c28f26b Mon Sep 17 00:00:00 2001 Subject: [PATCH] Fix annoyance of 2x05 IDC header triangle being so far out ...Header_2x05_P2.54mm_Vertical_Fixed_Ground_Fill.kicad_mod | 6 Panels/FIREBALL VCO.png Normal file View File 3D Printing/Pot_Knobs/Potentiometer Cap.STL Executable file View File Hardware/PCB/precadsr_aux_Gerbers/precadsr-NPTH.drl Normal file View File Panels/FireballSpellVertVerySmall.png Normal file Unescape Hardware/PCB/precadsr_Gerbers/precadsr-F_SilkS.gbr Normal file Unescape // Width of module (HP) width = 10; // diameter of the copyright owner or contributors be liable for any MIT License (MIT) Copyright (c) 2004,2005, Richard Boulton Copyright.

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