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7mm Non-Polar Electrolytic Capacitor C, Rect series, Radial, pin pitch=10.00mm, , diameter=30mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf CP Axial series Axial Horizontal pin pitch 27.50mm length 33mm width 13mm Capacitor C, Disc series, Radial, pin pitch=7.50mm, , length*width=10*3mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf C Rect series Radial pin pitch 5.08mm length 26mm diameter 11mm width 5.0mm Capacitor C, Rect series, Radial, pin pitch=15.24*22.86mm^2, , length*width=38.099999999999994*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf L_CommonMode_Toroid Vertical series Radial pin pitch 5.00mm length 7mm width 6.5mm Capacitor C, Rect series, Radial, pin pitch=7.10mm, , length*width=16.8*9.2mm^2, Vishay, TJ3, http://www.vishay.com/docs/34079/tj.pdf L_Toroid Vertical series Radial pin pitch 2.50mm diameter 3.0mm z-position of LED center 1.0mm 2 pins clear LED, Round, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.6mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins From 8576ad9482bca9af6d257ece2917df271c37db54 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Build images Images/PXL_20210831_000922493.jpg | Bin 0 -> 38764 bytes Panels/futura medium condensed bt.ttf' Delete 'Panels/futura medium condensed bt.ttf' ## Current draw PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ``` git clone git@gitlab.com:rsholmes/precadsr.git git submodule update Find and replace last few thin traces, fix teardrops and gnd fill Find and replace last few thin traces, fix teardrops and gnd fill Corrected: Shifted C5 so.

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