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9.996084e-01 3.524169e-04 facet normal 0.0982303 -0.0149446 0.995051 vertex -7.75279 -1.99403 19.9467 vertex -7.73568 -2.38614 19.9509 vertex 7.77665 5.30203 20.0916 facet normal 0.866024 -0.500003 0 vertex -6.04355 -2.39281 20 vertex -1.21798 6.38487 20 vertex -0.408138 6.48717 20 vertex -4.14326 -5.00834 20 vertex -0.408138 6.48717 19.9 facet normal 9.613948e-001 4.721924e-003 2.751321e-001 facet normal -0.0823699 0.081813 0.993238 vertex 0 8.56166 5.56266 facet normal -1.304261e-001 2.235997e-001 9.659152e-001 facet normal 0.299919 0.561108 0.771496 vertex -6.05401 -6.05401 5.56266 facet normal 0.60732 -0.740023 0.289014 facet normal -3.051877e-07 -1.000000e+00 -6.169139e-07 facet normal -0.0546157 0.55474 0.830229 facet normal 8.379959e-001 5.456765e-001 0.000000e+000 facet normal -3.934401e-001 6.745051e-001 6.246981e-001 facet normal -0.436801 0.865139 0.246453 vertex 6.92883 0.991719 7.78686 vertex -5.60181 4.2532 7.5827 vertex 4.13797 5.40019 7.76535 vertex -0.991719 -6.92883 7.78686 facet normal -9.089776e-01 0.000000e+00 -4.168449e-01 facet normal 0.0759151 0.77078 0.632562 vertex 1.70669 -8.58011 5.33536 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf ## Git repository https://gitlab.com/rsholmes/precadsr Submodules From 83b013c3637bfb179ad62b90a6c8b2f5fb547c8c Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add CV in controls the clock feature/seq_chaining Checkpoint before trying to add picture Schematics/{schematic_bugs_v1.txt => schematic_bugs_v1.md} | 3 | 4.7k | Resistor | | | | C3 | 1 .

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