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SSOP20: plastic shrink small outline package http://www.ti.com/lit/ds/symlink/drv8301.pdf HVSSOP, 10 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-lqfn/05081644_0_LQFN10.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py DFN8 2x2, 0.5P; CASE 505AB (see ON Semiconductor 506CN.PDF DC8 Package 8-Lead Plastic Dual Flat, No Lead Package (MA) - 2x2x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf TQFP, 100 Pin (JEDEC MO-153 Var DA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py VQFP, 80 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/AD9852.pdf), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py PLCC, 68 pins, surface mount PLCC, 52 pins, surface mount SMD package for Kodenshi SG-105 with PCB trace layout created pull request 'Put title box in PDF export 45cf8c00cd Merge pull request 'pcb_finalization' (#1) from bugfix/10hp into main ... Add notes about wiring SW15 cross-board Add design rules for jlcpcb Add some perfboard sections, power headers, teardrops checkpoint before getting really weird with WireIt dd8c61c34f A couple more minor clearance tweaks Add ground fills, fix some clearance issues, add.

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