3
1
Back

Body, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline (ST)-4.4 mm Body (see Atmel Appnote 8826 10-Lead Plastic DFN (4mm x 4mm) (see Linear Technology DFN_6_05-08-1703.pdf 6-Lead Plastic DFN (5.55mm x 5.2mm), Pin 5-8 connected to trigger, gate jack is normalized\nto +12 V, 10 mA -12 V ## Photos [to be added] ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: front, back How to use 7.5mm holes, not 6mm alpha pots.

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