3
1
Back

Close Testing before powering up: Clock In - ~27K to U3-8? No, transistors maybe activate? Clock Out - 1K to TP5 Latest commits for file Docs/precadsr_layout_front.pdf Panels/dual_vca.scad Normal file Unescape Hardware/Panel/precadsr-panel/precadsr-panel.pretty/precadsr-panel-holes.kicad_mod Normal file View File From 666c48f795106664bf9f1401667d0a4bc7a85e2a Mon Sep 17 00:00:00 2001 From 1a5b794ab9bac64e7d0bb61780efe97d27a2e668 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Bring in diylc and openscad design Bring in diylc and openscad.

New Pull Request