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266 .../precadsr_aux_Gerbers/precadsr-B_Paste.gbr | 4 .../precadsr_aux_Gerbers/precadsr-NPTH.drl | 4 .../precadsr_aux_Gerbers/precadsr-NPTH.drl | 4 | 1M | Resistor | | Q1, Q2, Q3 | 3 | AudioJack2 | Audio Jack, 2 Poles (Mono / TS *(optional) SIP socket, 2.54 mm, 1x4 Light emitting diode, 5 mm Small Signal NPN Transistor, TO-92 | | C6, C7, C8, C9 | 5 | 2N3904 | 0.2A Ic, 40V Vce, Small Signal NPN Transistor, TO-92 | | | | | | | | R31 | 1 | 10R | Resistor | | | | | | L1 | 1 | 10R | Resistor | | | | | | | | | | | R30 | 1 | 10R | Resistor | | | | Tayda | A-159 | | R6, R8 | 2 | 47k | Resistor | | | | J3, J4, J5 | 3 pin Molex connector 2.54 mm spacing D 2 pin Molex header 2.54 mm spacing D 3 pin Molex header 2.54 mm spacing | Tayda | A-3186 | | Tayda | A-3186 | | C2, C5, C6, C8, C9, C11, C12. - C10, C14 is a ceramic 104 power cap like C5, C6, C8, C9, C11, C12. - C10, C14 too small for film; is film needed? From cb59d1e9c06865f5bebe8c7ee0afa4859e0766b2 Mon Sep 17 00:00:00 2001 Subject: [PATCH] start From d7370bb10c83adef3d24b5bdfa6def9f11e35442 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Replaced accidentally dropped Fine tuning hole. Aa68d7a21d Am totally not using git correctly From 4fd9d8b7bf20541267f941aa2eacb4afbb30ba6a Mon Sep 17 00:00:00 2001 Subject: [PATCH] Finish schematic, add PDF Schematics/Fireball_VCO.pdf | Bin 0 -> 36336 bytes create mode 100644 Docs/precadsr.pdf create mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-drl_map.pdf create mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-PasteTop.gtp create mode 100644 Fireball/Fireball.kicad_dru create mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-SilkBottom.gbo create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/PinSocket_1x10_P2.54mm_Vertical.kicad_mod create mode 100644 Images/precadsr-panel-holes.png create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Bourns_3296W_Vertical.kicad_mod delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/3PDT-toggle-switch-1M-seriesx.kicad_mod create mode 100644 3D Printing/Panels/FIREBALL VCO.png Normal file Unescape Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: unplated through holes: unplated through holes: merged pull request 'new_footprints' (#5) from new_footprints into main ... Put title box in PDF export Merge pull request 'Finish schematic, add PDF' (#2) from schematic.

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