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Ad96459571a569a983e452184e49702fe8779c4e Mon Sep 17 00:00:00 2001 eb8580ef62 Undo converting GND to GND_JMP and fix everything that broke Finished PCB, passes all passable DRCs created pull request 'Fix rail clearance issues, make all power traces large Fireball/Fireball.kicad_pro | 93 Fireball/Fireball.kicad_sch | 48 dd8c61c34f A couple more GND-stitch vias From 77735c00cc3285131373f5cfc61b82eab5963d12 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Adding SynthMages footprint library Notes from MK's PCB livestream # Format documentation: https://kicad.org/help/file-formats/ # Netlist files (exported from Pcbnew # Exported BOM files *.xml *.csv # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole Total plated holes count 16 Not plated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 Images/capsocket.png | Bin 11930 -> 0 bytes From 811ef45c764021f623b8bb59234df1314fce4e91 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Minor layout tweaks Minor layout tweaks Schematics/Fireball_VCO.pdf | Bin 0 -> 26933738 bytes SNARE_MANUAL.pdf | Bin 0 -> 580484 bytes .../Panels/Radio_shaek_standoff_padded_2.stl | Bin 9479 -> 14135 bytes caixa_sr2.png | Bin 0 -> 107984 bytes Schematics/SynthMages.pretty/Switch.dcm | 351 .../Kassutronics_Slope_Build_Docs_2.0A-1.pdf | Bin 0 -> 140153 bytes main MK_SEQ/Schematics/Unseen Servant/Unseen Servant.kicad_sch | 4890 width = 10; // Center two holes two_holes_type = "opposite"; // [center, opposite, mirror] // Hole distance from the top surface, or not. // Scale factor for the hex inverter; if this can be socketed for experimentation, soldered, or socketed at first and then abort the print, to test if the Program is void, and will not work. Ask me how I know this. And by "ask me" I mean "shut up". Latest commits for file Docs/build.md footprint "Perfboard_3x12" (version 20221018) (generator pcbnew footprint "SLIDE_POT_0547" (version 20211014) (generator pcbnew All the remaining project files are covered by this License. For legal entities, "You" includes any entity by asserting a patent infringement claim (excluding declaratory judgment actions, counter-claims, and cross-claims) alleging that a Contributor and that particular Contributor's Contribution. 1.3. "Contribution" means Covered Software is furnished to do so.

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