3
1
Back

7.39225 vertex -4.46654 -5.55594 7.22283 facet normal 0.678289 -0.122657 0.724486 facet normal 0.0998673 -0.114117 0.988435 facet normal -0.484645 -0.0153859 0.874575 facet normal 0.0759145 -0.770773 0.63257 facet normal 3.946984e-001 -6.737715e-001 6.246960e-001 vertex -3.471306e+000 2.686626e+000 2.488700e+001 facet normal -0.707107 0.707107 0 vertex 10.1904 0 vertex -2.85317 0.927051 0 vertex 3.44415 8.31492 4.51215 facet normal 0.268373 0.884719 0.381114 facet normal 0.630632 -0.768498 0.108232 facet normal -0.489712 0.50788 0.708689 vertex -5.69935 -4.54285 7.24096 vertex 5.62839 4.67928 7.09583 vertex -7.3363 0.49869 6.98312 facet normal -0.0583821 0.0801952 0.995068 vertex 5.10003 -6.16972 19.9507 facet normal -0.796854 0.241723 0.553709 facet normal 0 0.833884 0.55194 Latest commits for file Schematics/LUTHERS_VCO.diy Update luther's layout Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes Total unplated holes count 16 Not plated through holes are merged with plated.

New Pull Request