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AVX-M (7260-20 Metric), IPC_7351 nominal, (Body size from: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator Molex KK 396 Interconnect System, old/engineering part number: A-41791-0014 example for new part number: A-41791-0007 example for new mpn: 39-28-918x, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator Hirose DF12C SMD, DF12C3.0-40DS-0.5V, 40 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator Connector Phoenix Contact connector footprint for: MCV_1,5/5-GF-3.5; number of pins: 10; pin pitch: 3.50mm; Angled || order number: 1843842 8A 160V Generic Phoenix Contact SPT 2.5/7-H-5.0-EX 1732438 Connector Phoenix Contact, SPT 5/7-V-7.5-ZB Terminal Block, 1732470 (https://www.phoenixcontact.com/online/portal/gb/?uri=pxc-oc-itemdetail:pid=1732470), generated with kicad-footprint-generator JST XH series connector, BM08B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py DSO DSO-8 SOIC SOIC-8 Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/ PowerPAK SO-8L Single (https://www.vishay.com/docs/64721/an913.pdf SOP, 16 Pin (https://www.onsemi.com/pub/Collateral/FUSB307B-D.PDF#page=56), generated with kicad-footprint-generator JST SH series connector, LY20-38P-DLT1, 19 Circuits (https://www.molex.com/pdm_docs/sd/2005280190_sd.pdf), generated with kicad-footprint-generator JST PH series connector, 53780-1470 (), generated with kicad-footprint-generator JST XA series connector, B13B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator Molex 734 Male header (for PCBs); Straight solder pin 1 (so is open or ground). Part of \nloop mod Part of speed \nswitch mod (0 F.Cu signal hide (31 B.Cu signal hide (31 B.Cu signal (32 B.Adhes user (33 F.Adhes user hide (35 F.Paste user hide (35 F.Paste user hide (42 Eco1.User user (43 Eco2.User user (44 Edge.Cuts user (45 "Margin" user (46 "B.CrtYd" user "B.Courtyard" 47 "F.CrtYd" user "F.Courtyard" attr (teardrop (type padvia min_thickness 0.0254) (filled_areas_thickness no min_thickness 0.25) (filled_areas_thickness no From 32ded0979b3a28a6950eb6a371cc2ef88606b4ff Mon Sep 17 00:00:00 2001 Subject: [PATCH 09/18] Apply jlcpcb's design rules, small fixes for those Fireball/Fireball.kicad_pro | 93 Fireball/Fireball.kicad_sch .

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