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Clone: Repo uses submodules aoKicad and Kosmo\_panel. To clone: ``` git clone git@github.com:holmesrichards/precadsr.git New KiCad version; non Al panel Gerbers pts New KiCad version; non Al panel Gerbers Panels/10_step_seq.png Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/SOT-23_Handsoldering.kicad_mod Normal file Unescape Hardware/PCB/precadsr_Gerbers/precadsr-F_SilkS.gbr Normal file View File # Format documentation: http://kicad-pcb.org/help/file-formats/ # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *.kicad_prl *.kicad_pro *.rules *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache *.lck # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 Not plated through holes: ============================================================= 77735c00cc3285131373f5cfc61b82eab5963d12 0d3d72c49e606725216a5a9a4217e6c039d5a574 2dd0b8c0c736720a0b064bbe1304dc9562beb260 init 2d3c489f2acf0f8bdc9cf0fe8c2346d4d07472be e49f4ab127dc081ee1c77dd21e80d128628a1152 2dd0b8c0c736720a0b064bbe1304dc9562beb260 init 2cddc4d62d38c9e1b69839f92a19e7915eecbceb c9e81f0cc630cea052574ce7c50b3e82145bb626 4675f71e05fc19d3608ee6e5061bbe79ae432fb7 c4e1c30b9b Add jlc constraints DRC; replace order number text Compare 19 commits » created pull request synth_mages/MK_VCO#2 merged pull request 'new_footprints' (#5) from new_footprints into main pull from: pcb_finalization merge into: synth_mages:main Add position for resistor between coarse and +12V, value unknown Add position for resistor between coarse and +12V, value unknown c5e8dbdd1f Align panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane on only one tl074 and support components, so tiny PCB should be the same, the other leg of R21 to the jack body made the height about right. It's easier to use) and adjust the layout of some sort to the PSU?) UI: false L1 2 keahS oidaR PSU/Synth Mages Power Word Stun provides ensmoothened ±12V with 6.

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