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BackIn whole or in part through the board, cross at 90° to minimize capacitance between traces vias connect through the power subsystem adds front panel 24ca7abc85681936397a2802c8155420fcaf679c updated C14 footprint, traces, groundplane updated C14 footprint, traces, groundplane updated C5 footprint & tracing; schematic annotation updated C5 footprint & tracing; schematic annotation updates the potentiometer pads and thermal vias; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf 20-Lead Plastic Thin Shrink Small Outline (SN) - Narrow, 3.90 mm Body [HTSSOP], with thermal vias HSOF-8-2 [TOLL] power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-2/ HSOF-8-2 [TOLL] power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-2/ HSOF-8-2 [TOLL] power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-1/ mosfet hsof toll thermal vias in pads, 4 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator JST SH series connector, 501331-1107 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator JST SH series connector.
- Olimex Olinuxino LIME2 development board Common.
- Printing/Panels/SPIDER CLIMB.png Latest commits for file.