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J9 | 1 | TL074 | Quad Low-Noise JFET-Input Operational Amplifiers, DIP-14/SOIC-14 | | | Tayda | A-962 | | C1, C11, C12 | 2 pin Molex connector 2.54 mm 2x5 | | Screws, nuts, and spacers (see build notes Change C13 to 10 steps, but limited by decade counter expects CLOCK to pass 1/2 of V+ (i.e. 6v) but many external clock sources cycle between 0v and 5v max // gate out (j4/j10 // clock out (j5/j12) // glide in (sleeve and normal both GND Glide attenuator (B10k) (join two left pins from below Clock rate (B100k) (not sure.

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