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Backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes unplated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Update README.md acf6d57d9f34ce2c424f4c9834d80264fa5ffd89 @circuitlocution.com renamed repository from precadsrprecadsr to synth_mages/precadsr master PSU/Synth Mages Power Word Stun Panel.kicad_pcb 4975 lines power word stun initial commit by { "board": { More tweaks after pro review Apply jlcpcb's design rules, small fixes for those Fireball/Fireball.kicad_pro | 6 Latest commits for file Envelope/Envelope.kicad_sch master PSU/Synth Mages Power Word Stun.kicad_pro | 85 cd18ed43dc Added hard sync to schematic, laid out PCB with exploratory.

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