3
1
Back

Eb8580ef62 Undo converting GND to GND_JMP and fix everything that broke 3583986e89 Finished PCB, passes all passable DRCs created pull request 'Finish schematic, add PDF Finish schematic, add PDF Features already done: - Internal clock with manual control. - Clock Rate - variable resist +6k between U2-8 and U2-9 - Reset Socket to U3-3 = capacitor measurement roughly 15nF (has a resistor limiting max drone frequency:
re-re-remove the mysterious extra trace Added schmancy pcb for v2 front panel design and.

New Pull Request