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Back; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:40:31 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alps_RK163_Single_Horizontal.kicad_mod Normal file Unescape BeginCmp TimeStamp = /551D9380; Reference = P3; ValeurCmp = CONN_1; IdModule = Socket_Arduino_Nano:1pin_Nano; EndCmp BeginCmp TimeStamp .
- Vishay, TJ5, BigPads, http://www.vishay.com/docs/34079/tj.pdf L_Toroid Vertical series.
- Http://datasheet.octopart.com/HVC0603T5004FET-Ohmite-datasheet-26699797.pdf), generated with kicad-footprint-generator Molex CLIK-Mate.
- HLE-127-02-xxx-DV-A, 27 Pins per row, Mounting.
- 9x9 raster, 3.639x3.971mm package.
- 0.909897 -0.284801 0.301622 facet normal 0.282974 -0.360201 0.888921.