3
1
Back

Strip, HLE-119-02-xx-DV-TE, 19 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator ipc_gullwing_generator.py 16-Lead Plastic Shrink Small Outline (ST)-4.4 mm Body [LFCSP]; (see https://www.intersil.com/content/dam/Intersil/documents/l72_/l72.10x10c.pdf LFCSP VQ, 48 pin, exposed pad, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf 8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm² body, exposed pad, thermal vias, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf Texas Instruments DSBGA BGA YFF S-XBGA-N5 Texas Instruments, DSBGA, 3.0x1.9x0.625mm, 28 ball 7x4 area grid, YZR pad.

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