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20240124 63579cf959 Add notes about UX component wiring \* The Dailywell 3PDT and SPDT toggle switches eea453f1eeea3c7619b9825ab723148f1dab934e Port in fixes from v1.1 74231bd333b049ab7b99365de62d937af76b0e42 Finish PCBs d74befe391233bd8b162f7f5705c277e04d9b135 Checkpoint after fixes but before shrinking boards Checkpoint after tweaking footprints some more, starting over Fireball/Fireball.kicad_sch | 6 Panels/FIREBALL VCO.png | Bin 0 -> 578884 bytes .../Panels/Radio_shaek_standoff_thick.stl | Bin 0 -> 2441420.

PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md.
Selectable capacitors for slower.
BM10B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py TQFN.
0.290264 -0.0119204 facet normal -0.992165 -0.101034.

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