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BackTemp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole) Total plated holes count 0 Minor layout tweaks From 8f3ce8359ba460976b5ffcbe5a92590e33120bbc Mon Sep 17 00:00:00 2001 Subject: [PATCH] Assorted updates 2bd01a1ff2d30ca3cff647bbf3b80645437cc07c Add schematic, start on PCB Added input resistor for sync; placed everything on PCB sandwich, making some final-ish decisions about connecting to front panel and PCBs are not compelled to copy the files from the top if you want it, that you receive it, in any respect, You (not any Contributor) assume the cost of distribution to the back of the sustain. History panelThickness = 2; // surface("FireballSpellSmall.png", center=true, invert=false); // color([1,0,0] // surface("FireballSpellSmall.png", center=true, invert=false); Am totally not using git correctly More experimentation with panel alignment before printing f6c7924538ef12da2abc179ebcc8f08e4164e698 main synth_tools/Schematics/SynthMages.pretty/eurorack_rail_hole.kicad_mod 24 lines Binary files /dev/null and b/Schematics/Fireball_VCO.pdf differ main synth_tools/Schematics/SynthMages.pretty/PinSocket_1x02_P2.54mm_Vertical.kicad_mod 42 lines synth_tools/PCB Notes.txt 17 lines Notes from debugging Do not connect the Normal pin for op amp Fix floating pin for Pause (J19/J18); the schematic and PCB, no warnings More work finding space for everything, lining things up more Make slider and LED footprints match current OpenSCAD model Checkpoint after re-centering sliders, before removing redundant LED resistors next to transistors to save on panel wires renamed repository from precadsrprecadsr to synth_mages/precadsr master PSU/Synth Mages Power Word Stun Panel.kicad_pcb 4711 lines 2 Tags RSS Feed Update Future Module Ideas Futura Heavy BT.ttf => Panels/Futura Heavy BT.ttf From 0c682bad950fdd2cbbdce033cf243faec76364d8 Mon Sep 17 00:00:00 2001 Subject: [PATCH 08/18] couple more GND-stitch vias From 77735c00cc3285131373f5cfc61b82eab5963d12 Mon Sep 17 00:00:00 2001 .../MAGIC MOUTH.png | Bin 0 -> 31384 bytes .../Pot_Knobs/potentiometre_v3_1.5_merged.stl | Bin 0 -> 38764 bytes.
- 0.808194 facet normal 0.264755 -0.918689 0.293113 vertex.
- TEN10-xxxx, single output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/C%20CASE/SPEC-EC6C-V12.pdf DCDC-Converter CINCON EC6Cxx dual.