Labels Milestones
Back1P1T SMD PTS125 Series 12mm Tact Switch Low-profile SMD Tactile Switch, B3SL Middle Stroke Tactile Switch, B3SL Middle Stroke Tactile Switch for High-Density Packaging Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810245, 2 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 28 Pin (package code T2844-1; https://pdfserv.maximintegrated.com/package_dwgs/21-0139.PDF), generated with kicad-footprint-generator Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-LC, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py 16-Lead Lead Frame Chip Scale Package - 3x3 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf DCB Package 8-Lead Plastic DFN (2mm x 2mm), http://ams.com/eng/content/download/950231/2267959/483138 DD Package; 8-Lead Plastic PSOP, Exposed Die Pad (see https://www.diodes.com/assets/Package-Files/SO-8EP.pdf 20-Lead Plastic Quad Flat Pack, 3x3mm Body, 0.65mm Pitch, S-PVSON-N8, http://www.ti.com/lit/ds/symlink/opa2333.pdf 3x3mm Body, 0.65mm Pitch, S-PVSON-N8, http://www.ti.com/lit/ds/symlink/opa2333.pdf 3x3mm Body, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32mp151a.pdf ST UFBGA-73, 5.0x5.0mm, 73 Ball, 9x9 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g491re.pdf ST WLCSP-81, ST die ID 479, 3.56x3.52mm, 64 Ball, 8x8 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb55vc.pdf Texas Instruments DSBGA BGA YZP R-XBGA-N8 Texas Instruments, DSBGA, 1.36x1.86mm, 10 bump 3x4 (area) array, NSMD pad definition Appendix A Virtex-7 BGA, 42x42 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=93, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lmc555.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, area grid, NSMD pad definition Appendix A BGA 324 0.8 GateMate FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12 Ball, 4x3 Layout.
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