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BackDie ID 466, 1.86x2.14mm, 18 Ball, X-staggered 21x11 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g431c6.pdf ST WLCSP-49, ST die ID 460, 2.3x2.48mm, 25 Ball, 5x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g483me.pdf ST WLCSP-81, ST die ID 482, 4.2x3.95mm, 90 Ball, X-staggered 18x10 Layout, 0.4mm Pitch, https://www.ti.com/lit/ml/mxbg419/mxbg419.pdf, https://www.ti.com/lit/ds/symlink/tmp117.pdf Texas Instruments, DSBGA, 1.43x1.41mm, 8 bump 3x3 array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lmc555.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments EUK 7 Pin Double Sided Module Texas Instruments (http://www.ti.com/lit/ds/symlink/tps22993.pdf QFN, 24 Pin (JEDEC MS-013AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_wide-rw/rw_16.pdf), generated with kicad-footprint-generator JST PH series connector, BM06B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55935-0810, with PCB trace layout 4efd2875e8 Replaced accidentally dropped Fine tuning hole. Am totally not using git correctly Am totally not using git correctly Latest commits for file Docs/build.md footprint "Perfboard_3x12" (version 20221018) (generator pcbnew main arrasta/arrasta_playbook_v0.9.txt 106 lines REP: repique CAX: caixa MSD: mid surdo (sometimes MS1, MS2, etc, if pattern spans measures or variations BSD: back surdo // 1 for manual reset button to run once - Pause sequence and resume - a function of the knob's circumference. Enable_external_indicator = false; // Number of faces on the mid surdos.