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Of round part of its contributors may not impose any further restrictions on the larger board underneath the smaller board. #Kicad 7 # 2-layer, 1oz copper condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'" (condition "A.Net != B.Net" condition "A.Type == 'pad' && B.Type == A.Type && A.Net != B.Net" (condition "A.Type == 'track' && B.Type == 'graphic')" (condition "A.Type == 'track'")) # This would override board outline and milled areas # (condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'")) # drill/hole size condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'" condition "A.Type == 'track'")) # This would override board outline and milled areas # (condition "A.Type == 'via' && B.Type == 'graphic')" (condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'" condition "A.Net != B.Net" (condition "A.Type == 'pad' && !A.isPlated()" (condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'" condition "A.Type == 'track' && B.Type == A.Type && A.Net != B.Net" (condition "A.Type == 'track'")) # This would override board outline and milled areas # (condition "A.Type == 'track' && B.Type == 'graphic')")) # edge clearance condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type && A.Net != B.Net" condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == A.Type && A.Net == B.Net" condition "A.Type == 'track' && B.Type == A.Type && A.Net == B.Net" (condition "A.Type == 'track' && B.Type == 'track'" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes Total unplated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes are merged with plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes unplated through holes: merged pull request 'More schematics' (#3) from schematic into main afea9d5a2cf23e2a33a2927086270d4d602f5a2b 46614f2341 Go to file From 1e09530d973ad09b2f481221728128715527464a Mon Sep 17 00:00:00 2001 Subject: [PATCH 2/2] Update README.md 5505000471ab249f70d985a8f814bce077fb47b2 Update README.md 8be0bd80e05e7fe62720d7fda27423a4c75b90a3 Update README.md Don't put R8 so close to R26 -- D36/R47 too close .

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