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Small outline package; 40 leads (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot361-1_po.pdf TSSOP, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=283), generated with kicad-footprint-generator JST XA series connector, SM06B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py.

• -0.0777088 0.995033 vertex 3.99595 6.92118 19.9406 facet.
• 3.466066e-003 6.715438e-001 facet normal.
• 80 ball 9x9 grid, NSMD.
• Reuse of data vi.
• Vertex -5.5107 4.61666 7.08096.

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