3
1
Back

-0.0754488 -0.63836 facet normal 0.111554 0.367742 0.923213 vertex 9.14279 0 3.76384 facet normal 0.109834 -0.552183 -0.826456 vertex -0.4 3.34543 7.96516 vertex -1.31069 3.16429 12.85 vertex -1 5.45679 20.501 vertex -1 7.30206 6.90928 vertex -1 5.78941 6.73694 vertex -1 6.37595 12.8553 vertex 1 0 20.5 vertex 0.95 5.78941 6.73694 vertex 1 7.26455 7.25222 vertex 1 0 PCM_kikit Fiducial Circular Fiducial fiducial 0 1 Y Y 5 N DEF SW_DPST_x2 SW 0 0 Y N 1 F N DEF SW_DP3T SW 0 0 Y N 1 F N DEF 3_pin_Molex_header J 0 40 Y N 1 F N DEF SW_DIP_x08 SW 0 40 Y Y 1 F N DEF SW_Push_45deg SW 0 40 Y Y 1 F N DEF SW_DIP_x06 SW 0 20 Y N 2 F N DEF SW_Rotary3x4 SW 0 40 Y N 1 F N DEF Synth_power_2x5_passive J 0 40 Y N 2 F N DEF SW_SP3T SW 0 40 Y Y 1 F N DEF SW_DPST_x2 SW 0 0 (add_net "/Pots, switches, misc/PUSH_1_P" (add_net "/Pots, switches, misc/PUSH_2_P" (format (units 3) (units_format 1) (precision 4 (style (thickness 0.1) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0) keep_text_aligned Add control label font so we don't lose it 734cf9b18c Add the label font size to 9mm and align it precisely for repeatability Align panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a Updates from real TL0x4, fix pots being backwards, tighten.

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