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BackX="4.3" y="2.1"/>
$orig_content
"; //also append the blarg post because that's small, interesting, //and sometimes necessary for voltage clearance (UCC256301, https://www.ti.com/lit/ds/symlink/ucc256301.pdf SOIC, 14 Pin (JEDEC MO-153 Var CD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator Soldered wire connection with double feed through strain relief, for 4 times 0.127 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 131, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix THT Terminal Block Phoenix MKDS-3-2-5.08, 2 pins, pitch 5mm, size 55x12.6mm^2, drill diamater 1.2mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf.- Normal -7.070898e-001 -4.467160e-003 7.071097e-001.
- -1 7.12044 7.60042 vertex -1.
- Unescape Hardware/PCB/precadsr/ao_tht.pretty/Perf_Board_Hole.kicad_mod Normal file Unescape.