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Tuning hole. Am totally not using git correctly Am totally not using git correctly More experimentation with panel alignment before printing 9a2ab6dc7f initial notes for v1 build Schematics/bad_trace_v1.jpeg Normal file Unescape HP = 5.08; //If you want to make fitting inside a case easier. Or 10mm if it can fit; losing the bodge area. Outs: Clock Out - 1K to TP5 Gate Out - Diode from rotary pin 13? CV Out - Diode from rotary pin 13? CV Out - Diode from rotary pin.

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