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Examples/EG_MANUAL.pdf schematic start, and some example modules Envelope/Envelope.kicad_pcb | 2 ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:40:31 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes: merged pull request 'pcb_finalization' (#1) from pcb_finalization into main 1705ad98fb Put title box in PDF export' (#4) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 Generated from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 | Refs | Qty | Component | Description | Manufacturer | Part | Vendor | SKU | | S1 | 1 | B10k | \*\*Potentiometer, 9 mm or 16 mm vertical board mount | | C1 | 1 | 4.7 uF | Polarized capacitor | | | | | | | Tayda | A-962 | | | | Screws, nuts, and spacers (see [build notes](build.md | | Tayda .

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