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Label font size to 9mm and align it precisely for repeatability b11a8d31874f2e074879a668b4f6eb5f32915bd6 Change transistor footprint to inline_wide, fix DRC ground plane Change transistor footprint to inline_wide, fix DRC ground plane Binary files /dev/null and b/caixa_sr1.png.

• Diameter=41.9mm, Vishay, TJ7, http://www.vishay.com/docs/34079/tj.pdf L_Toroid.
• CB), generated with kicad-footprint-generator ipc_noLead_generator.py QFN.

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