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(https://katalog.we-online.com/em/datasheet/97730356332.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SOP, 24 Pin (http://www.ti.com/lit/ds/symlink/bq24133.pdf#page=40 Texas Instruments, DSBGA, area grid, NSMD pad definition Appendix A Kintex-7 and Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=273, https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=284, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=84, NSMD pad definition (http://www.ti.com/lit/ds/symlink/opa330.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA-6, 0.704x1.054mm, NSMD, YKA pad definition, 1.468x0.705mm, 8 Ball, 2x4 Layout, 0.5mm Pitch, https://ww1.microchip.com/downloads/en/DeviceDoc/16B_WLCSP_CS_C04-06036c.pdf WLCSP-20, 4x5 raster, 1.934x2.434mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf UFBGA 132 Pins, 0.5mm Pitch, https://www.ti.com/lit/ds/symlink/dac80508.pdf Analog LFCSP, 16 Pin (http://www.intersil.com/content/dam/Intersil/documents/l16_/l16.5x5.pdf), generated with kicad-footprint-generator JST VH series connector, B3P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator JST XH series connector, S30B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py HTSSOP28: plastic thin shrink small outline package; 48 leads; body width 3.9 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot369-1_po.pdf SSOP, 16 Pin (http://www.ti.com/lit/ds/symlink/drv8801.pdf#page=31 MO-220 variation VJJD-2), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py PLCC, 44 pins, single row Through hole IDC header, 2x05, 2.54mm pitch, 6mm pin length, double rows Surface.

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