Labels Milestones
BackDSO DSO-8 SOIC SOIC-8 Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias; see section 7.8 of http://www.st.com/resource/en/datasheet/DM00387108.pdf Texas Instruments, DSBGA, 0.9x1.4mm, 6 bump 2x3 (perimeter) array, NSMD pad definition Appendix A BGA 324 0.8 CS324 CSG324 BGA 324 0.8 GateMate FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12 Ball, 3x4 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stulpi01a.pdf TFBGA-64, 8x8 raster, 4.539x4.911mm package, pitch 0.5mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32l011k3.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.8mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32f042k6.pdf WLCSP-36, 6x6 raster, 2.553x2.579mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf UFBGA-144, 12x12 raster, 10x10mm package, pitch 0.4mm; see section 6.2 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf TFBGA-265, 17x17 raster, 14x14mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf UFBGA 132 Pins, 0.5mm Pitch, DSC0010J, WSON, http://www.ti.com/lit/ds/symlink/tps61201.pdf Plastic Small Outline (SO) (http://www.everlight.com/file/ProductFile/201407061745083848.pdf 5-Lead Plastic Small Outline (SS)-5.30 mm Body [TSSOP] with exposed pad (http://cds.linear.com/docs/en/datasheet/34301fa.pdf SSOP 0.65 exposed pad 8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [DFN.
- 502426-2610, 26 Pins per row.
- For repeatability d6ebbf1c1b Collect other files not.
- + 6 + tolerance.