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13 Binary files a/Panels/futura medium bt.ttf // 13 SPDT switches: .

• 2 BYLAYER 70 0 3 vertex -3.44415 8.31492.
• Are copper fill applied everywhere there.
• -7.011925e-01 -3.483989e-03 7.129634e-01 vertex -1.047458e+02 9.695134e+01 9.438131e+00.
• [DFN-S] (see Microchip Packaging Specification.
• Normal -0.878615 0.0865373 0.469624 vertex -8.88682.

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