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BackCreated on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/PinSocket_1x10_P2.54mm_Vertical.kicad_mod Normal file View File db7d02719b Go to file From 1e09530d973ad09b2f481221728128715527464a Mon Sep 17 00:00:00 2001 Subject: [PATCH] More cleanup d12ec1f19bbae8f01395e4c76a152d3d4ce7a3d4 Align panel to integer pseudo-origin, remove testing text, decrease title label font so we don't lose it d433f7c09a85cc6fc15536169665e257a929b9f6 Add the label font size to 9mm and align it precisely for repeatability b11a8d31874f2e074879a668b4f6eb5f32915bd6 Change transistor footprint to inline_wide, fix DRC ground plane Change transistor footprint to inline_wide, fix DRC ground plane created pull request synth_mages/MK_VCO#4 24955050f1 Merge pull request 'new_footprints' (#5) from new_footprints into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/1 Merge pull request 'Put title box in PDF export' (#4) from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/2 From 972d8b1e0797912e848110b19e1af10ed411bbbb Mon Sep 17 00:00:00 2001 Subject: [PATCH 13/18] Add footprint items for panel holes; separate panel and pcb into different files main MK_VCO/Panels/luther_triangle_vco_quentin_v4.scad 303 lines default_label_font = "Futura Md BT:style=Medium"; font_for_title = "Futura Md BT:style=Medium"; font_for_title = "QuentinEF:style=Medium"; title_font_size = 12; // [1:1:84] caixa_sr1.png Normal file View File 3D Printing/Cases/Eurorack Modular Case/DSC03765.JPG Executable file Unescape threeUHeight = 133.35; //overall 3u height panelOuterHeight =128.5; panelInnerHeight = 110; // rail clearance issues, make all power traces large From 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Mon Sep 17 00:00:00 2001 Subject: [PATCH] Use THT electrolytics, finish SMT layout, try on quentin font for size Compare 2 commits » 14162964f9 Add circuit blocks to kick drum schematic 2dd0b8c0c736720a0b064bbe1304dc9562beb260 Latest commits for file Fireball/Fireball.kicad_prl couple more minor clearance tweaks 99b8f1493d More layout updates Delete 'Panels/futura medium condensed bt.ttf | Bin 0 -> 144834 bytes .../Pot_Knobs/pot_knob_two_parts_cap.stl | Bin 0 -> 12724 bytes .../POLYMORPH.png | Bin 0 -> 11692 bytes .../HOLD PORTAL.png | Bin.
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