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Files *.000 *.bak *.bck *.zip *.DS_Store *~ .gitignore-extra *.dsn *.kicad_pcb-bak *.kicad_sch-bak *.kicad_prl *.kicad_pro *.rules *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache # Netlist files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: merged pull request 'Finish schematic, add PDF Compare 3 commits from pcb_finalization into main created pull request 'More schematics' (#3) from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/5 From d8eca8dc7ee0c083143ca1478ae7c1277063e5c9 Mon Sep 17 00:00:00 2001 Subject: [PATCH] PCB initial layout, no traces Fireball/Fireball.kicad_prl | 4 .../PCB/precadsr_Gerbers/precadsr-F_SilkS.gbr | 1166 .../PCB/precadsr_Gerbers/precadsr-NPTH.drl | 17 .../PCB/precadsr_aux_Gerbers/precadsr-PTH.drl | 22 .../precadsr_aux_Gerbers/precadsr-job.gbrjob | 128 .../PCB/precadsr_Gerbers/precadsr-NPTH.drl | 17 .../precadsr_panel_al/precadsr_panel_al.sch | 264 .../Panel/precadsr_panel_al/sym-lib-table | 4 Synth Mages Power Word Stun.kicad_sch | 2886 create mode 100644 Hardware/Panel/precadsr-panel/sym-lib-table create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alps_RK163_Single_Horizontal.kicad_mod delete mode 100644 Images/PXL_20210831_001017829.jpg create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_Panel_Dual_Slotted_Mounting_Hole_NPTH.kicad_mod delete mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-PasteTop.gtp create mode 100644 Hardware/PCB/precadsr_Gerbers/precadsr-PTH.drl create mode 100644 3D Printing/Pot_Knobs/pot_knob_two_parts_base.stl Normal file Unescape Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Pot_Hole.kicad_mod Normal file Unescape # precadsr.sch BOM Documentation, some cosmetic sh/PCB updates main synth_tools/Schematics/SynthMages.pretty/Perfboard_3x12.kicad_mod 80 lines Add radio shaek with cv2 version Add html test version facet normal 0.0822199 0.0560555 -0.995037 vertex 9.68164 -2.48334 0.0479704 facet normal 0.430898 -0.353597 0.830239 facet normal -0.979662 0.187916 -0.0703586 vertex 5.12616 -8.69622 0.0491304 facet normal 7.799906e-001 6.257913e-001 0.000000e+000 facet normal 0.766032 0.0754488 -0.63836 facet normal 2.70719e-05.

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