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Back*.kicad_pro *.rules *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache # Netlist files (exported from Eeschema # Autorouter files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: merged pull request synth_mages/MK_VCO#5 613d1b6f7e Merge pull request 'pcb_finalization' (#1.
- 17.00mm diameter 11.176mm Diameter12-5mm Amidon-T44 L_Toroid, Horizontal.
- 9.106134e-01 -1.135808e-03 4.132577e-01 facet normal -0.118608.
- Female pitch 2.29x2.54mm pin-PCB-offset 9.4mm 44-pin D-Sub.
- 7.5439 vertex 6.71541 0.672644 7.35649.
- Fastron Choke, Drossel, PISR, Fastron.