Y="5.75"/> <-- CV In main MK_VCO/Panels/fireball_vco_14hp_v1.scad 330 lines width = 14; // [1:1:84] /* [Holes] */ // // top horizontal rib h_wall(h=4, l=right_rib_x); // middle-bottom h rib // h_wall(h=4, l=right_rib_x); // bottom right [right_edge, rotate_vector_sin * rail_depth] // top horizontal rib // h_wall(h=4, l=right_rib_x); // middle-bottom h rib h_wall(h=1.6, l=right_rib_x); // one more vertical to mount the circuit board to, dead center pcb_holder(h=10, l=top_row-rail_clearance*2, th=1.15, wall_thickness=1); // lower h-rib reinforcer ## Photos [to be added] ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 3d279dd88c Finish schematic, add PDF' (#2) from schematic into main ... Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.9-73d0e3b20d~88~ubuntu20.04.1 Generated from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/4 Put title box in PDF export Schematics/Fireball_VCO.pdf | Bin 0 -> 38764 bytes Panels/futura medium bt.ttf From 303a55e23667987c98f6d6f4be567bff3180e8cb Mon Sep 17 00:00:00 2001 Subject: [PATCH] Checkpoint after tweaking footprints some more, starting over at 14hp main synth_tools/3D Printing/Cases/Eurorack Modular Skeleton/Eurorack_box_v105.stl Executable file View File Panels/label_test.stl Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_RD902F-40-00D_Dual_Vertical_CircularHoles_centered.kicad_mod Normal file View File 3D Printing/Pot_Knobs/FS_PotiKnob_d6D12h9.stl Executable file Unescape Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x08_P2.54mm_Vertical.kicad_mod Normal file Unescape move bugs to md file to be able to add picture 5082711a98 Add a front-panel PCB Send Account Recovery Email The build is pretty straightforward except for mechanical assembly, and two other things: C13 is marked on the 16-pin IDC connector when nothing is plugged into CLOCK. A notable issue with this design.