3
1
Back

HLE-124-02-xxx-DV-LC, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py TQFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc0015.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py Texas instruments QFN Package, datasheet: https://www.ti.com/lit/ds/symlink/tpsm53602.pdf Texas Instruments, DSBGA, area grid, YBG pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.5mm Pitch, 0.3mm Ball, http://www.st.com/resource/en/datasheet/stm32l486qg.pdf UFBGA-144, 12x12 raster, 10x10mm package, pitch 0.8mm; see section 6.6 of http://www.st.com/resource/en/datasheet/DM00273119.pdf X1-WLB0909, 0.89x0.89mm, 4 Ball, 2x2 Layout, 0.35mm Pitch, https://www.onsemi.com/pdf/datasheet/ncp163-d.pdf#page=23 6pin Pitch 0.4mm 8-Lead Plastic Dual Flat, No Lead Package - 4.0x4.0x0.8 mm Body [SOIC], see https://ac-dc.power.com/sites/default/files/product-docs/senzero_family_datasheet.pdf Power-Integrations variant of 8-Lead Plastic PSOP, Exposed Die Pad (see https://www.diodes.com/assets/Package-Files/SO-8EP.pdf 20-Lead Plastic Thin Quad Flat, No Lead Package (MD) - 4x4x0.9 mm Body [QFN] with corner pads and thermal vias; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f100v8.pdf TFBGA-100, 10x10 raster, 4.201x4.663mm package, pitch 0.4mm; see section 7.6 of.

New Pull Request