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Level chip-size package; 15 bumps (6-3-6), 2.37x1.17mm, 15 Ball, 6x3 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100168.PDF XBGA-121, 11x11 raster, 10x10mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00340475.pdf WLCSP-66, 9x9 raster, 4.4084x3.7594mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-64, 8x8 raster, 3.347x3.585mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/DM00366448.pdf WLCSP-168, 12x14 raster, 4.891x5.692mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UCBGA-81, 9x9 raster, 4.4084x3.7594mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf WLCSP-64, 8x8 raster, 5x5mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf WLCSP-36, 6x6 raster, 2.5x2.5mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/DM00366448.pdf WLCSP-168, 12x14 raster, 4.891x5.692mm package, pitch 0.35mm; https://datasheets.maximintegrated.com/en/ds/MAX40200.pdf WLP-9, 1.448x1.468mm, 9 Ball, 3x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g0b1ne.pdf#page=136 ST WLCSP-64, ST die ID 494, 3.3x3.38mm, 49 Ball, 7x7 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF NXP VFBGA-42, 3.0x2.6mm, 42 Ball, 6x7 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32u575og.pdf#page=306 ST WLCSP-100, ST die ID 471, 4.437x4.456mm, 100 Ball, 10x10 Layout, 0.55mm Pitch, https://www.dialog-semiconductor.com/sites/default/files/da1469x_datasheet_3v1.pdf#page=740 VFBGA-100, 10x10, 7x7mm package, pitch 0.8mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f301r8.pdf WLCSP-49, 7x7 raster, 3.277x3.109mm package, pitch 0.4mm; see section 36.2.3 of http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42363-SAM-D11_Datasheet.pdf WLCSP-56, 7x8 raster, 3.170x3.444mm package, pitch 0.35mm; https://datasheets.maximintegrated.com/en/ds/MAX40200.pdf WLP-9, 1.448x1.468mm, 9 Ball, 3x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l496wg.pdf ST WLCSP-132, ST die ID 482, 4.2x3.95mm, 90 Ball, X-staggered 7x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g0b1ne.pdf#page=136 ST WLCSP-64, ST die ID 456, 1.94x2.4mm, 20 Ball, 4x5 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF NXP VFBGA-42, 3.0x2.6mm, 42 Ball, 6x7 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g0b1ne.pdf#page=136 ST WLCSP-64, ST die ID 460, 2.3x2.48mm, 25 Ball, 5x5 Layout, 0.4mm Pitch, YFF0006, NSMD pad definition Appendix A Artix-7 and Zynq-7000 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=93, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lm4990.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, 0.822x1.116mm, 5 bump 2x1x2 array, NSMD pad definition Appendix A BGA 484 0.8 SBG485 SBV485 LFCSP, exposed pad, thermal vias, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf Texas Instruments DSBGA BGA Texas Instruments, NDQ, 5 pin (https://www.ti.com/lit/ml/mmsf022/mmsf022.pdf TO-PMOD-11 11-pin switching regulator package, http://www.ti.com/lit/ml/mmsf025/mmsf025.pdf Vishay PowerPAK SC70 dual transistor package http://www.vishay.com/docs/70486/70486.pdf.

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