Labels Milestones
BackF.Mask" "Notes": "Layer F.Mask" "Notes": "Layer B.Cu" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Thu Aug 12 11:11:04 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: merged pull request 'Put title box in PDF export' (#4) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 **Component Count:** 76 | Refs | Qty | Component | Description | Manufacturer | Part | Vendor | SKU | | Tayda | A-1138 | | Tayda | A-1138 | | J2 | 1 | Synth_power_2x5 | Pin socket, 2.54 mm, 1x7 | | | Tayda | A-1605 | | | | | | | J6 | 1 Hardware/lib/aoKicad | 1 | Conn_01x10 | Pin socket.
- -1.822821e-01 -1.015564e-03 vertex -9.035159e+01 1.004099e+02 1.656905e+01 facet normal.
- -5.080899e-01 8.613040e-01 0.000000e+00 vertex -9.202120e+01.
- Strip, HLE-112-02-xxx-DV-BE-A, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf.