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Gate jack is normalized\nto +12 V, 10 mA -12 V ## Photos [to be added] ## Documentation: ### Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf ## Git repository https://gitlab.com/rsholmes/precadsr Submodules From 83b013c3637bfb179ad62b90a6c8b2f5fb547c8c Mon Sep 17 00:00:00 2001 Subject: [PATCH] More repo cleanup, adopt github .gitignore file afea9d5a2cf23e2a33a2927086270d4d602f5a2b Final revision; added custom DRC as project file tstamp 885d8854-95c7-40d1-bee9-0e598504ab1c) Final revision; added custom DRC as project file polygon (pts New KiCad version.

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