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49 Ball, 7x7 Layout, 0.8mm Pitch, https://www.infineon.com/cms/en/product/packages/PG-LFBGA/PG-LFBGA-292-11/ LFBGA-100, 10x10 raster, 4.775x5.041mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l476me.pdf WLCSP-81, 9x9 raster, 4.4084x3.7594mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152ze.pdf WLCSP-143, 11x13 raster, 4.539x5.849mm package, pitch 0.6mm; http://ww1.microchip.com/downloads/en/DeviceDoc/39969b.pdf Zynq-7000 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=305, NSMD pad definition (http://www.ti.com/lit/ds/symlink/bq51050b.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, 1.36x1.86mm, 12 bump 3x4 (perimeter) array, NSMD pad definition Appendix A BGA 676 1 RF676 RFG676 Artix-7 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=268, NSMD pad definition Appendix A Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=299, NSMD pad definition Appendix A BGA 900 1 FF900 FFG900 FFV900 FF901 FFG901 FFV901 Artix-7, Kintex-7 and Zynq-7000 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=95, NSMD pad definition Appendix A BGA 1156 1 RF1157 RF1158 Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=264, NSMD pad definition Appendix A BGA 225 0.8 CLG225 Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=306, NSMD pad definition Appendix A BGA 484 0.8 SBG485 SBV485 LFCSP, exposed pad, 7x7mm body (http://www.analog.com/media/en/technical-documentation/data-sheets/AD7951.pdf, http://www.analog.com/en/design-center/packaging-quality-symbols-footprints/symbols-and-footprints/AD7951.html LFCSP-WD, 8 Pin (https://datasheet.lcsc.com/lcsc/2204011730_GigaDevice-Semicon-Beijing-GD5F1GQ4UFYIGR_C2986324.pdf (page 44)), generated with kicad-footprint-generator ipc_noLead_generator.py DFN8 2x2, 0.5P; No exposed pad (http://cds.linear.com/docs/en/datasheet/34301fa.pdf SSOP 0.65 exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-87/ 12-Lead Plastic DFN (5mm x 4mm) (see Linear Technology DFN_16_05-08-1709.pdf DHC Package; 18-Lead Plastic DFN (5mm x 4mm) (see Linear Technology DFN_8_05-08-1702.pdf 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [QFN] with corner pads and trace routing to de-bodge the pots. Updates the potentiometer shaft clf_indicator_angle_from_notch = 0; // [0:No, 1:Yes] TaperAngle=asin(KnobHeight / (sqrt(pow(KnobHeight, 2) pow(KnobMajorRadius-KnobMinorRadius,2)))) .

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