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(4 holes) T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: unplated through holes: ============================================================= 9060b76361734f9abf9a1c676dd9110e9ced917b initial kicad project initial kicad project d9153c70802a10d2fe554f80f1a497b409aac630 4675f71e05fc19d3608ee6e5061bbe79ae432fb7 c4e1c30b9b Add jlc constraints DRC; replace order number text replaces FIREBALL mask/etch with silkscreen caaf12f2da0fe056d0b625b9c1a860efbae9f4d1 adds ideas for a 1uF capacitor; expand a bit, but also size it for.

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