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On Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes Total unplated holes count 0 Minor layout tweaks From 8f3ce8359ba460976b5ffcbe5a92590e33120bbc Mon Sep 17 00:00:00 2001 Subject: [PATCH] More repo cleanup, adopt github .gitignore file More repo cleanup, adopt github .gitignore file More repo cleanup, adopt github .gitignore file .gitattributes | 2 Smaller cap (476nF?) for C1 - Ceramic 104s for C10, C14, might be fine, might introduce intermittents - Don't put R8 so close to R26 D36/R47 too close - Clock rate (B100k) (not sure yet which 2 pins Rectangular size 3.0x2.0mm^2 2 pins LED diameter 3.0mm 2 pins LED Round FlatTop Rectangular size 5.0x2.0mm^2 3 pins THT ceramic resonator filter DSN6 Ceramic Resomator/Filter Murata DSN6, http://cdn-reichelt.de/documents/datenblatt/B400/DSN6NC51H.pdf, length*width=7.0x2.5mm^2 package, package length=7.0mm, package width=2.5mm, 3 pins Ceramic Resomator/Filter 7.0x2.5mm^2, length*width=7.0x2.5mm^2 package.

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