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Date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: unplated through holes: merged pull request synth_mages/MK_VCO#5 b554ec2138 Add footprint items for panel holes; separate panel and pcb into different files 5082711a98 Add.

(end 2.731 -1.04 (end.
-4.851187e-001 -8.489580e-001 2.095952e-001 facet.
PH top entry Molex FFC/FPC.
(https://katalog.we-online.com/em/datasheet/9775066360.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SOIC, 8.

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