3
1
Back

S22B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py Infineon PG-DSO, 8 Pin (https://www.st.com/resource/en/datasheet/ld1086.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py 20-Lead Frame Chip Scale Package LFCSP (5mm x 5mm) (see http://www.everspin.com/file/236/download DFN8 2x2, 0.5P; No exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-87/ 12-Lead Plastic DFN (5mm x 3mm) (see Linear Technology DFN_12_05-08-1695.pdf DF Package; 12-Lead Plastic DFN (5.55mm x 5.2mm), Pin 5-8 connected to trigger, gate jack is normalized\nto +12 V, and sustain voltage is taken from \npot.

New Pull Request