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Back*~ .gitignore-extra *.dsn *.kicad_pcb-bak *.kicad_sch-bak *-backups *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache # Netlist files (exported from Pcbnew # Exported BOM files *.xml *.csv # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes.
- 0.468627 -0.876744 0.108209 vertex 1.19444.
- // The number of pins: 02; pin pitch.
- 0.388082 -0.237833 0.890409 facet normal.
- Vertex 4.28602 0.223703 18.7299 vertex 3.96091.
- 0.954686 0.0546222 facet normal -0.0729387 -0.0676785.