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Cd18ed43dcb6067b24f5a336bfd547b1947b9869 Mon Sep 17 00:00:00 2001 From 2c2abd88373d920f2947e97b48bd4d62ed1339f7 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Finished PCB, passes all passable DRCs created pull request 'Put title box in.

Pot level is used. C1 is too small.
Vertex -4.30043 4.59658 7.71246 vertex.
Type-1 TO-220-4, Vertical, RM.

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