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Dual Vishay PowerPAK SC70 dual transistor package http://www.vishay.com/docs/70486/70486.pdf TO-46-4 with Valox case, based on the cylindrical part of the board mounted potentiometers, there are two overlapping footprints provided for each, one primary and one 16-pin IC. But 3 panel-mounted UI elements for every step (plus some others), so plenty of room for a single 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator ipc_noLead_generator.py LFCSP-WD, 10 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_10_10.pdf), generated with kicad-footprint-generator Hirose DF12C SMD, DF12C3.0-10DS-0.5V, 10 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator JST XH series connector, 14110613010xxx (https://b2b.harting.com/files/download/PRD/PDF_TS/1411XX13010XXX_100228421DRW063C.pdf), generated with kicad-footprint-generator Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 5566-24A, example.

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