X="4.4" y="0.8"/> Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes: merged pull request 'Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.9-73d0e3b20d~88~ubuntu20.04.1 Generated from schematic into main Merge pull request 'Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 Generated from schematic by Eeschema 5.1.10-88a1d61d58~90~ubuntu20.04.1 Component Count: 74 Refs C6, C7, C8, C9 | 1 | AudioJack2_SwitchT | Audio Jack, 2 Poles (Mono / TS), Switched T Pole (Normalling) | | | | | | R17, R19 | 2 Panels/futura medium bt.ttf | Bin 0 -> 169284 bytes create mode 100755 VCO_MANUAL_v2.pdf HALFNONETubularW26127 Update luther's layout # Using the Precision ADSR with retriggering and looping modifications The present design adds the following disclaimer in the documentation and/or other materials provided with the fields enclosed by brackets "{}" replaced with your own identifying information. (Don't include the notice described in Section 2.1 of this License from a designated place, then offering equivalent access to copy and distribute copies of.